(1) Field of the Invention
The present invention relates to a pulse generating circuit and, more particularly, to a pulse generating circuit for generating a pulse having a time width synchronized with a clock signal coming from the outside and corresponding to a reference voltage.
(2) Description of the Prior Art
As a voltage generating circuit for generating a signal having a specified voltage waveform, there is known in the art a voltage signal generating circuit for generating a pulse signal having a predetermined time width and period to feed a constant current in response to the pulse signal and for driving a switch to charge and discharge a capacitor thereby generating the potential of the capacitor as the signal having the above-specified voltage waveform.
In order to generate the voltage signal having the desired waveform, the aforementioned voltage signal generating circuit is required to have that pulse signal synchronized with an external signal (such as a clock signal) thereby to generate pulses having a time width corresponding precisely to the reference voltage. An example of such a pulse generating circuit which we developed in an integrated circuit (IC), is shown in Japanese Patent Laid-Open No. 58-92258, "Voltage Generating Circuit" by Matsubara et al. This circuit generates pulses having a time width synchronized with the period of an external clock signal and proportional to the value of a reference voltage. This is accomplished by feeding a constant current to an integrating capacitor through a switch to be turned on or off in synchronism with that clock signal, by comparing the potential of the integrating capacitor with that reference voltage by means of a comparator, and by feeding that clock signal and the output signal of that comparator to a logic circuit.
In this earlier circuit, however, the pulse width cannot be so correctly set as to be proportional to that reference voltage because of the parasitic capacitances such as the input gate capacitor of the circuit constructing that comparator, the junction capacitance of the transistor composing the current source or other wiring capacitors. In order to reduce the influences of those parasitic capacitances, it is sufficient to set the capacitance of that integrating capacitor at a large value. However, this is impractical if it is to be realized by a large scale integrated circuit (LSI).